6.205: Digital Systems Laboratory I
SystemVerilog and FPGAs! :)
Lab-intensive subject that investigates digital systems with a focus on FPGAs. Lectures and labs cover logic, flip flops, counters, timing, synchronization, finite-state machines, digital signal processing, communication protocols, and modern sensors. Prepares students for the design and implementation of a large-scale final project of their choice: games, music, digital filters, wireless communications, video, or graphics. Extensive use of System/Verilog for describing and implementing and verifying digital logic designs.
Table of Contents
- Reference: Verilog/FPGA Tips
- Lecture 1: Intro, SystemVerilog
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Lab 1: Combinational and Sequential Logic, LED Controller
- Lecture 2: Synthesis & FPGAs, Combinational Verilog, SystemVerilog Constructs, Wire vs. Logic
- Lecture 3: Sequential Logic/Verilog, Combinational and Sequential Logic, Debouncer
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Lab 2: SPI (Serial Peripheral Interface) Controller, ADC
- Lecture 4: Hardware Tips, Sequential Timing & Glitches, Register to Register Timing
- Lecture 5: Metastability, State Machines (Moore & Mealy), Enums & FSM Output Glitching
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Lab 3: UART (Universal Asynchronous Receiver/Transmitter)
- Lecture 6: FSMs in History, Clocks and Time, Making Frequencies and Clocks, Slack & Timing
- Lecture 7: TV Video, VGA (Video Graphics Array), Video on the FPGA
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Lab 4: HDMI (High-Definition Multimedia Interface), TMDS (Transmission Minimized Differential Signaling)
- Lecture 8: Memory In/Off the FPGA
- Lecture 9: Images, FSM Modularity, Pipelining, Complexity of Math Operations
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Lab 5: Camera and Object Tracking, Pipelining
- Lecture 10: Pipelining/Dividers, Algorithms in Hardware
- Lecture 11: AXI (Advanced eXtensible Interface), First-In-First-Out (FIFO), Resource Usage
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Lab 6: LFSRs (Linear Feedback Shift Registers), SDRAM, HD Camera
- Lecture 12: Signed Numbers, Digital Signal Processing (Discretization and Quantization)
- Lecture 13: Interfacing with Devices, UART/Serial/SPI, I2C (Inter-Integrated Circuit), I2S (Inter-IC Sound)
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Lab 7: CRC (Cyclic Redundancy Check), Convolution
- Lecture 14: Power and Energy Intro, Transistors, Power Reduction Strategies
- Project: SpectroRun (Just Shapes and Beats–inspired musical bullet hell on the FPGA), Block Diagrams, Vivado IP